发明名称 |
Driver and display device including the same |
摘要 |
The present invention relates to a driver and a display device including the same, wherein the driver includes: a first driving circuit generating a first output signal; a second driving circuit generating a second output signal; and at least one buffer circuit generating a third output signal of a voltage level corresponding to a gate-on voltage level of the first output signal or the second output signal when the first output signal or the second output signal is transmitted as a gate-on voltage level, and the buffer circuit includes a first transistor transmitting the voltage of the first level as the third output signal, and a second transistor transmitting the voltage of a second level turning off the first transistor and connected to the gate electrode of the first transistor. |
申请公布号 |
US9275580(B2) |
申请公布日期 |
2016.03.01 |
申请号 |
US201113038557 |
申请日期 |
2011.03.02 |
申请人 |
Samsung Display Co., Ltd. |
发明人 |
Chung Bo-Yong |
分类号 |
G09G3/32;G09G3/36;G11C19/18 |
主分类号 |
G09G3/32 |
代理机构 |
|
代理人 |
Bushnell, Esq. Robert E. |
主权项 |
1. A driver comprising:
a first driving circuit receiving a first input signal and three phase clock signals and generating a first output signal controlled according to a first clock signal among the three phase clock signals; a second driving circuit receiving a second input signal and the three phase clock signals and generating a second output signal controlled according to a second clock signal among the three phase clock signals; and at least one buffer circuit generating a third output signal of a voltage level corresponding to a gate-on voltage level of the first output signal or the second output signal when the first output signal or the second output signal is transmitted as the gate-on voltage level, wherein the buffer circuit includes:
a first transistor transmitting a voltage of a first level as the third output signal, anda second transistor transmitting a voltage of a second level turning off the first transistor and connected to a gate electrode of the first transistor; anda third transistor connected to the gate electrode of the first transistor and transmitting a voltage of a third level less than the voltage of the first level turning on the first transistor. |
地址 |
Samsung-ro, Giheung-Gu, Yongin-si, Gyeonggi-Do KR |