| 发明名称 | Semiconductor chips | ||
| 摘要 | A semiconductor chip includes a core region having a plurality of first memory cells and a first edge adjacent to a first side of the core region. The first edge includes a first region and a second region. The first region includes a plurality of second memory cells, and the second region includes a first pad portion through which at least one of an address signal, a command signal, a clock signal, a data signal and a control signal is inputted or outputted. | ||
| 申请公布号 | US9275687(B2) | 申请公布日期 | 2016.03.01 |
| 申请号 | US201313965887 | 申请日期 | 2013.08.13 |
| 申请人 | SK Hynix Inc. | 发明人 | Lee Yin Jae |
| 分类号 | G11C5/02;G11C8/12 | 主分类号 | G11C5/02 |
| 代理机构 | William Park & Associates Ltd. | 代理人 | William Park & Associates Ltd. |
| 主权项 | 1. A semiconductor chip comprising: a core region including a plurality of first memory cells; and a first edge adjacent to a first side of the core region, wherein the first edge includes a first region and a second region, wherein the first region includes a plurality of second memory cells and the second region includes a first pad portion through which at least one of an address signal, a command signal, a clock signal, a data signal and a control signal is inputted or outputted, wherein the first edge and the core region are sequentially arrayed in a first direction, and wherein the first region and the second region are sequentially arrayed in a second direction. | ||
| 地址 | Gyeonggi-do KR | ||