发明名称 |
NON-PLANAR SEMICONDUCTOR DEVICE HAVING DOPED SUB-FIN REGION AND METHOD TO FABRICATE SAME |
摘要 |
Non-planar semiconductor devices having doped sub-fin regions and methods of fabricating non-planar semiconductor devices having doped sub-fin regions are described. For example, a method of fabricating a semiconductor structure involves forming a plurality of semiconductor fins above a semiconductor substrate. A solid state dopant source layer is formed above the semiconductor substrate, conformal with the plurality of semiconductor fins. A dielectric layer is formed above the solid state dopant source layer. The dielectric layer and the solid state dopant source layer are recessed to approximately a same level below a top surface of the plurality of semiconductor fins, exposing protruding portions of each of the plurality of semiconductor fins above sub-fin regions of each of the plurality of semiconductor fins. The method also involves driving dopants from the solid state dopant source layer into the sub-fin regions of each of the plurality of semiconductor fins. |
申请公布号 |
US2016056156(A1) |
申请公布日期 |
2016.02.25 |
申请号 |
US201314779936 |
申请日期 |
2013.06.20 |
申请人 |
INTEL CORPORATION |
发明人 |
GHANI TAHIR;LATIF SALMAN;MUNASINGHE CHANAKA D. |
分类号 |
H01L27/092;H01L21/225;H01L29/08;H01L21/3105;H01L21/8238;H01L27/088;H01L21/8234;H01L21/265 |
主分类号 |
H01L27/092 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
Santa Clara CA US |