发明名称 3-D PLANES MEMORY DEVICE
摘要 The present invention is a means and a method for manufacturing large three dimensional memory arrays. The present invention is a means and a method for addressing the WL and BL resistance by creating arrays having not only large plane conductors for each of the memory layers (WLs) but also for the opposite polarity common layer (BL). The present invention is also a means and a method to form via interconnections between the substrate logic and the respective layers of a multidimensional array. The present invention is also a way to operate an array in which the select device is unipolar but the array is above to be operated in a bipolar way. This facilitates a bipolar operation for memory cell technologies such as Resistive RAM (e.g., RRAM, ReRAM and Memresistors).
申请公布号 US2016056206(A1) 申请公布日期 2016.02.25
申请号 US201514835642 申请日期 2015.08.25
申请人 HGST, Inc. 发明人 SHEPARD Daniel R.
分类号 H01L27/24;H01L21/3213;H01L21/311;H01L23/528;H01L21/768 主分类号 H01L27/24
代理机构 代理人
主权项 1. A memory device comprising (i) one or more bit line areas in the substrate, each bit line area having a width that is greater than 2 CD wide, (ii) a plurality of layers comprising information storage elements, each such layer comprising a word line area having a width that is greater than 2 CD wide, and (iii) a plurality of vertical conductive posts passing through the plurality of layers, whereby a vertical conductive post passes through a layer at a point proximate to an information storage element.
地址 San Jose CA US