发明名称 Circuit structures, memory circuitry, and methods
摘要 A circuit structure includes a substrate having an array region and a peripheral region. The substrate in the array and peripheral regions includes insulator material over first semiconductor material, conductive material over the insulator material, and second semiconductor material over the conductive material. The array region includes vertical circuit devices which include the second semiconductor material. The peripheral region includes horizontal circuit devices which include the second semiconductor material. The horizontal circuit devices in the peripheral region individually have a floating body which includes the second semiconductor material. The conductive material in the peripheral region is under and electrically coupled to the second semiconductor material of the floating bodies. Conductive straps in the array region are under the vertical circuit devices. The conductive straps include the conductive material and individually are electrically coupled to a plurality of the vertical circuit devices in the array region. Other implementations are disclosed.
申请公布号 US9269795(B2) 申请公布日期 2016.02.23
申请号 US201414287659 申请日期 2014.05.27
申请人 Micron Technology, Inc. 发明人 Zahurak John K.;Tang Sanh D.;Heineck Lars P.;Roberts Martin C.;Mueller Wolfgang;Liu Haitao
分类号 H01L29/66;H01L27/12;H01L21/84;H01L29/78;H01L27/108;H01L45/00;H01L27/24 主分类号 H01L29/66
代理机构 Wells St. John, P.S. 代理人 Wells St. John, P.S.
主权项 1. A method, comprising: forming a semiconductor-metal-on-insulator substrate having the semiconductor, conductive, and insulator materials extending from an array region to a peripheral region; at the same time, subtractively patterning the conductive material within the array region and to separate the conductive material from being connected between the peripheral region and the array region; and forming transistors in the peripheral region, the transistors individually comprising a floating body comprising the semiconductor material, the forming of the peripheral region transistors comprising: forming the semiconductor material in the peripheral region to comprise a first dopant concentration first conductivity-type region that is elevationally over and directly against a second dopant concentration first conductivity-type region; and including forming the second dopant concentration to be higher than the first dopant concentration, forming the second dopant concentration region to be directly against the conductive material, and forming the second dopant concentration region to be discontinuous across the floating body.
地址 Boise ID US