PLANAR SRFET USING NO ADDITIONAL MASKS AND LAYOUT METHOD

摘要

A semiconductor power device is supported on a semiconductor substrate of a first conductivity type with a bottom layer functioning as a bottom electrode and an epitaxial layer overlying the bottom layer with a same conductivity type as the bottom layer. The semiconductor power device includes a plurality of FET cells and each cell further includes a body region of a second conductivity type extending from a top surface into the epitaxial layer. The body region encompasses a heavy body dopant region of second conductivity type. An insulated gate is disposed on the top surface of the epitaxial layer, overlapping a first portion of the body region. A barrier control layer is disposed on the top surface of the epitaxial layer next to the body region away from the insulated gate. A conductive layer overlies the top surface of the epitaxial layer covering a second portion of the body region and the heavy body dopant region extending over the barrier control layer forming a Schottky junction diode.

主权项

1. A semiconductor power device comprising an active cell area having a plurality of power transistor cells supported on a semiconductor substrate, wherein:
each of said power transistor cells comprising a planar insulated gate laterally extending and overlapping a portion of a body region encompassing a heavily doped body region of same conductivity type therein; the heavily doped body region having a body dopant concentration higher than the body region and extends from a top surface of the substrate into the body region and away from an outer edge of the body region distant from the planar insulated gate; wherein a Schottky junction barrier metal overlaying a space between adjacent body regions forming a Schottky diode there-in-between wherein the plurality power transistor cells are configured to surround and sharing the space between the adjacent body region as an integrated and shared Schottky diode substantially enclosed by the body regions of the plurality of power transistors.