发明名称 Methods of forming a channel region for a semiconductor device by performing a triple cladding process
摘要 One illustrative method disclosed herein includes, among other things, forming a plurality of trenches that define a fin, performing a plurality of epitaxial deposition processes to form first, second and third layers of epi semiconductor material around an exposed portion of the fin, removing the first, second and third layers of epi semiconductor material from above an upper surface of the fin so as to thereby expose the fin, selectively removing the fin relative to the first, second and third layers of epi semiconductor material so as to thereby define two fin structures comprised of the first, second and third layers of epi semiconductor material, and forming a gate structure around a portion of at least one of the fin structures comprised of the first, second and third layers of epi semiconductor material.
申请公布号 US9263555(B2) 申请公布日期 2016.02.16
申请号 US201414322987 申请日期 2014.07.03
申请人 GLOBALFOUNDRIES Inc. 发明人 Pawlak Bartlomiej Jan;Behin-Aein Behtash;Salmani-Jelodar Mehdi
分类号 H01L29/66;H01L29/78;H01L21/02 主分类号 H01L29/66
代理机构 Amerson Law Firm, PLLC 代理人 Amerson Law Firm, PLLC
主权项 1. A method, comprising: forming a plurality of trenches in a semiconductor substrate so as to define a fin; performing a plurality of epitaxial deposition processes to form first, second and third layers of epi semiconductor material around an exposed portion of said fin; performing at least one process operation to remove said first, second and third layers of epi semiconductor material from above an upper surface of said fin so as to thereby expose said fin; performing an etching process to selectively remove said fin relative to said first, second and third layers of epi semiconductor material so as to thereby define two fin structures comprised of said first, second and third layers of epi semiconductor material; and forming a gate structure around a portion of at least one of said fin structures comprised of said first, second and third layers of epi semiconductor material.
地址 Grand Cayman KY