Scalable, common reference-clocking architecture using a separate, single clock source for blade and rack servers

摘要

Scalable, common reference-clocking architecture and method for blade and rack servers. A common reference clock source is configured to provide synchronized clock input signals to a plurality of blades in a blade server or servers in a rack server. The reference clock signals are then used for clock operations related to serial interconnect links between blades and/or servers, such as QuickPath Interconnect (QPI) links or PCIe links. The serial interconnect links may be routed via electrical or optical cables between blades or servers. The common reference clock input and inter-blade or inter-server interconnect scheme is scalable, such that the plurality of blades or servers can be linked together in communication. Moreover, when QPI links are used, coherent memory transactions across blades or servers are provided, enabling fine grained parallelism to be used for parallel processing applications.

主权项

1. A system, comprising:
a plurality of server blades or servers, each having an external reference clock signal input port and at least one link interconnect interface; a clock synthesizer board, configured to generate a plurality of common reference clock signals at a plurality of output connectors; a plurality of reference clock signal cables, each coupled between a respective output connector on the clock synthesizer board and an input port on a respective server blade or server; and a plurality of interconnect link cables coupled at opposing ends to the link interconnect interfaces and linking the plurality of server blades or servers in communication, wherein, during operation of the system, the common reference clock signals are used as interconnect system clock inputs to facilitate communication between the server blades or servers over the plurality of interconnect link cables.