Memory systems including an input/output buffer circuit

摘要

Memory systems are provided. A memory system may include a plurality of nonvolatile memories and a memory controller configured to control the plurality of nonvolatile memories. Moreover, the memory system may include an input/output buffer circuit connected between the memory controller and the plurality of nonvolatile memories. A data channel may be connected between the memory controller and the input/output buffer circuit, and first and second internal data channels may be connected between the input/output buffer circuit and respective first and second groups of the plurality of nonvolatile memories. The input/output buffer circuit may be configured to connect the data channel to one of the first and second internal data channels.

主权项

1. A memory system, comprising:
a nonvolatile memory package; a memory controller configured to control the nonvolatile memory package, wherein the nonvolatile memory package comprises groups of nonvolatile memory devices respectively connected to internal data channels; and an input/output buffer circuit configured to connect a data channel to one of the internal data channels when data signals are input to or output from the memory controller via the data channel, wherein the input/output buffer circuit comprises an input/output unit configured to operate in a program operation, wherein the input/output unit comprises:
a receiver configured to receive the data signals from the memory controller;a sampler configured to sample the data signals from the receiver in response to a data strobe signal to output internal data signals;a delay locked loop circuit configured to generate an internal data strobe signal by performing delay synchronization on the data strobe signal;a de-multiplexer configured to connect the data channel to one of the internal data channels based on at least one control signal input from the memory controller; andoutput drivers configured to receive the internal data signals output from the sampler via the de-multiplexer and to output the internal data signals to the one of the internal data channels connected to the data channel, and wherein the internal data strobe signal and the internal data signals are output to one of the groups of nonvolatile memory devices.