Methods of forming replacement gate structures on transistor devices with a shared gate structure and the resulting products

摘要

One illustrative method disclosed herein includes, among other things, forming a shared gate cavity that spans across an isolation region and is positioned above first and second active regions, forming at least one layer of material in the shared gate cavity above the first and second active regions and above the isolation region, forming a first masking layer that covers portions of the shared gate cavity positioned above the first and second active regions while exposing a portion of the shared gate cavity positioned above the isolation region, with the first masking layer in position, performing at least one first etching process to remove at least a portion of the at least one layer of material in the exposed portion of the shared gate cavity above the isolation region, and removing the first masking layer.

主权项

1. A method of forming replacement gate structures for first and second transistor devices that are formed in and above adjacent first and second active regions, respectively, that are separated by an isolation region, said first and second transistor devices comprising a shared gate structure, wherein the method comprises:
performing at least one etching process to remove a sacrificial gate structure for said first and second transistor devices to thereby define a shared gate cavity that spans across said isolation region and is positioned above said first and second active regions; forming at least one layer of material in said shared gate cavity above said first and second active regions and above said isolation region; forming a first masking layer that covers portions of said shared gate cavity positioned above said first and second active regions while exposing a portion of said shared gate cavity positioned above said isolation region; with said first masking layer in position, performing at least one first etching process to remove at least a portion of said at least one layer of material in the exposed portion of said shared gate cavity above said isolation region; and removing said first masking layer.