Self-aligned implantation process for forming junction isolation regions

摘要

A device includes a semiconductor substrate, a well region in the semiconductor substrate, and a Metal-Oxide-Semiconductor (MOS) device. The MOS device includes a gate dielectric overlapping the well region, a gate electrode over the gate dielectric, and a source/drain region in the well region. The source/drain region and the well region are of opposite conductivity types. An edge of the first source drain region facing away from the gate electrode is in contact with the well region to form a junction isolation.

主权项

1. A device comprising:
a semiconductor substrate; a well region in the semiconductor substrate; a Metal-Oxide-Semiconductor (MOS) device comprising:
a gate dielectric overlapping the well region;a gate electrode over the gate dielectric; anda first source/drain region in the well region, wherein the first source/drain region and the well region are of opposite conductivity types, and wherein an edge of the first source/drain region facing away from the gate electrode contacts the well region to form a junction isolation; a first photo diode adjacent to the MOS device and in the semiconductor substrate, wherein the well region comprises a first edge in contact with an edge of the first photo diode; and a second photo diode adjacent to the MOS device and in the semiconductor substrate, wherein the well region comprises a second edge in contact with an edge of the second photo diode.