发明名称 SELECTION DEVICE
摘要 Provided is a selection device including an acquisition section for acquiring digital selection signals, and an output section for outputting selection signals to respective unit cells, each unit cell capable of being commanded to output the value zero. The selection device is characterized in that: each selection signal is for commanding the unit cell to output a value corresponding to that selection signal; the sum of the values to be output as commanded by the respective selection signals, which are output to the respective unit cells, is a value determined in association with the digital selection signal; and if the output corresponding to the digital selection signal is the value zero, then selection signals each commanding to output a non-zero value (N) are output to some of the unit cells.
申请公布号 US2016036459(A1) 申请公布日期 2016.02.04
申请号 US201514884155 申请日期 2015.10.15
申请人 Trigence Semiconductor, Inc. 发明人 YASUDA Akira;Okamura Jun-ichi
分类号 H03M1/74;H04R3/00 主分类号 H03M1/74
代理机构 代理人
主权项 1. A selection device receiving a digital signals and outputting a total value of outputs of a plurality of unit cells, each of unit cells outputting a plus value and a minus value, comprising: a circuit outputting a signal representing a number of unit cells outputting a plus value among the plurality of unit cells, and a signal representing a number of unit cells outputting a minus value among the plurality of unit cells; a selection circuit of a plus side selecting a unit cell outputting a plus value among the plurality of unit cells based on a frequency of selection of the unit cell and the signal representing a number of unit cells outputting a plus value among the plurality of unit cells, a selection circuit of a minus side selecting a unit cell outputting a minus value from the plurality of unit cells based on a frequency of selection of the unit cell and the signal representing a number of unit cells outputting a minus value among the plurality of unit cells, wherein, a value of average time of the total value of outputs of a unit cell outputting a plus value selected by the selection circuit of a plus side and a unit cell outputting a minus value selected by the selection circuit of a minus side correspond to said digital signals.
地址 Tokyo JP