Functional Testing of an Integrated Circuit Chip

摘要

A method of functionality testing system circuitry on an integrated circuit chip, the system circuitry comprising a plurality of sub-circuits and the integrated circuit chip further comprising debugging circuitry, the debugging circuitry comprising variability circuitry. The method comprises: at the system circuitry, performing a function by the sub-circuits performing concurrent actions; at the variability circuitry, altering relative timing of the concurrent actions so as to increase the likelihood of one or more errors in the system circuitry's performance of the function; and at the debugging circuitry, recording one or more errors in the system circuitry's performance of the function.

主权项

1. An integrated circuit chip comprising:
system circuitry configured to perform a function, the system circuitry comprising a plurality of sub-circuits configured to perform the function by performing concurrent actions; debugging circuitry configured to detect one or more errors in the system circuitry's performance of the function, the debugging circuitry comprising variability circuitry; wherein the debugging circuitry is configured to functionally test the system circuitry by:
at the variability circuitry, altering relative timing of the concurrent actions so as to increase the likelihood of one or more errors in the system circuitry's performance of the function, wherein the relative timing of the concurrent actions is altered by applying an error to one or more of the concurrent actions; andrecording one or more errors.