| 发明名称 |
TOP ELECTRODE FOR DEVICE STRUCTURES IN INTERCONNECT |
| 摘要 |
Some embodiments relate to an integrated circuit device. The integrated circuit device includes a resistive random access memory (RRAM) cell, which includes a top electrode and a bottom electrode that are separated by a RRAM dielectric layer. The top electrode of the RRAM cell has a recess in its upper surface. A via is disposed over the RRAM cell and contacts the top electrode within the recess. |
| 申请公布号 |
US2016035975(A1) |
申请公布日期 |
2016.02.04 |
| 申请号 |
US201514880358 |
申请日期 |
2015.10.12 |
| 申请人 |
Taiwan Semiconductor Manufacturing Co., Ltd. |
发明人 |
Chen Hsia-Wei;Chu Wen-Ting;Tu Kuo-Chi;Chang Chih-Yang;Yang Chin-Chieh;Liao Yu-Wen;You Wen-Chun;Shih Sheng-Hung |
| 分类号 |
H01L45/00 |
主分类号 |
H01L45/00 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. An integrated circuit device, comprising:
a resistive random access memory (RRAM) cell comprising a top electrode and a bottom electrode separated by a RRAM dielectric layer, wherein the top electrode of the RRAM cell has a recess in its upper surface; and a via over the RRAM cell, wherein the via contacts the top electrode within the recess. |
| 地址 |
Hsin-Chu TW |
