Three dimensional integrated circuit electrostatic discharge protection and prevention test interface

摘要

The present disclosure provides a system and method for providing electrostatic discharge protection. A probe card assembly is provided which is electrically connected to a plurality of input/output channels. The probe card assembly can be contacted with a secondary assembly having an interposer electrically connected to one or more wafers each wafer having a device under test. Voltage can be forced on ones of the plural input/output channels of the probe card assembly to slowly dissipate charges resident on the wafer to thereby provide electrostatic discharge protection. A socket assembly adaptable to accept a 3DIC package is also provided, the assembly having a loadboard assembly electrically connected to a plurality of input/output channels. Once the 3DIC package is placed within the socket assembly, voltage is forced on ones of the input/output channels to slowly dissipate charges resident on the 3DIC package to thereby provide electrostatic discharge protection.

主权项

1. A method of providing electrostatic discharge protection comprising the steps of:
(a) providing a probe card assembly electrically connected to a plurality of input/output (I/O) channels; (b) contacting the probe card assembly with a secondary assembly, the secondary assembly having an interposer electrically connected to one or more wafers each wafer having a device under test, the one or more wafers having charges thereon; (c) forcing a first voltage on ones of the plurality of I/O channels of the probe card assembly, so as to program I/O levels of the device under test to the first voltage; and (d) after step (c), forcing a second voltage of same magnitude and opposite sign from the first voltage on the ones of the plurality of I/O channels of the probe card assembly, so as to program the I/O levels of the device under test to the second voltage, to dissipate the charges.