发明名称 Electrophoretic display apparatus and image-updating method thereof
摘要 An electrophoretic display apparatus and an image-updating method thereof are provided. The electrophoretic display apparatus comprises a display panel and a source driver. The display panel comprises a plurality of pixels and a plurality of source lines, and each pixel electrode is electrically coupled to an AC common voltage through a corresponding capacitor. The capacitor comprises a plurality of charged particles. The source driver comprises a first data-latching circuit and a second data-latching circuit. Each of the data-latching circuits comprises a transistor, a capacitor and an inverter. The first data-latching circuit receives image data and a data shift-register output pulse. The second data-latching circuit is electrically coupled between an output terminal of the first data-latching circuit and a source line and is used for receiving a data output pulse.
申请公布号 US9251742(B2) 申请公布日期 2016.02.02
申请号 US201213439976 申请日期 2012.04.05
申请人 AU OPTRONICS CORP. 发明人 Kuo Ping-Sheng;Lin Hsiang-Lin;Chan Chih-Cheng;Huang Sheng-Wen
分类号 G09G3/34 主分类号 G09G3/34
代理机构 WPAT, PC 代理人 WPAT, PC ;King Justin
主权项 1. An electrophoretic display apparatus, comprising: a display panel comprising a plurality of pixels and a plurality of source lines, each of the pixels being electrically coupled a corresponding one of the source lines, each of the pixels comprising a pixel electrode and a capacitor, the capacitor comprising a plurality of charged particles, the pixel electrode of each of the pixels being electrically coupled to an alternating current (AC) common voltage through a corresponding capacitor; and a source driver electrically coupled to the source lines, and the source driver comprising: a first data-latching circuit, comprising: a first transistor having a first source/drain terminal, a second source/drain terminal and a gate terminal, the first source/drain terminal of the first transistor being configured for receiving image data, and the gate terminal of the first transistor being configured for receiving a data shift-register output pulse;a first capacitor electrically coupled between the second source/drain terminal of the first transistor and a reference voltage; anda first inverter having an input terminal and an output terminal, the input terminal of the first inverter being electrically coupled to the second source/drain terminal of the first transistor; anda second data-latching circuit, comprising: a second transistor having a first source/drain terminal, a second source/drain terminal and a gate terminal, the first source/drain terminal of the second transistor being electrically coupled to the output terminal of the first inverter, and the gate terminal of the second transistor being configured for receiving a latching-enable pulse;a second capacitor electrically coupled between the second source/drain terminal of the second transistor and the reference voltage; anda second inverter having an input terminal and an output terminal, the input terminal of the second inverter being electrically coupled to the second source/drain terminal of the second transistor, and the output terminal of the second inverter being electrically coupled to one of the source lines; wherein the display panel further comprises a plurality of gate lines, and each of the pixels is electrically coupled to a corresponding one of the gate lines, the electrophoretic display apparatus further comprises a gate driver electrically coupled to the gate lines for respectively outputting a plurality of gate pulses to the gate lines in sequence, the enabling period of the latching-enable pulse is during the enabling period of a corresponding one of the gate pulses outputted from the gate driver, and the enabling period of the data shift-register output pulse is preceding the enabling period of the corresponding one of the gate pulses outputted from the gate driver.
地址 Hsin-Chu TW