发明名称 PIXEL CIRCUIT AND DISPLAY
摘要 A pixel circuit and a display are configured to reduce the size of the pixel circuit, and in turn reduce the pixel pitch and increase the pixel number per unit area, and thus improve the display quality of pictures. The pixel circuit comprises a first pixel sub-circuit and a second pixel sub-circuit, and an initialization module (31) and a data voltage writing module (32) connected to the first pixel sub-circuit and the second pixel sub-circuit, wherein the initialization module (31) is connected to a reset signal terminal and a low level terminal, and is configured to initialize the first pixel sub-circuit and the second pixel sub-circuit under the control of a reset signal input at the reset signal terminal; and the data voltage writing module (32) is connected to a data voltage terminal and a gate signal terminal, and is configured, under the control of a signal input at the gate signal terminal, to firstly write a first data voltage to the first pixel sub-circuit and perform compensation for a driving module (331) of the first pixel sub-circuit, and then write a second data voltage to the second pixel sub-circuit and perform compensation for a driving module (332) of the second pixel sub-circuit.
申请公布号 US2016027379(A1) 申请公布日期 2016.01.28
申请号 US201314366141 申请日期 2013.12.12
申请人 BOE TECHNOLOGY GROUP CO., LTD. ;ORDOS YUANSHENG OPTOELECTRONICS CO., LTD. 发明人 CHEN Junsheng
分类号 G09G3/32 主分类号 G09G3/32
代理机构 代理人
主权项 1. A pixel circuit comprising a first pixel sub-circuit and a second pixel sub-circuit, and an initialization module and a data voltage writing module connected to the first pixel sub-circuit and the second pixel sub-circuit, wherein the initialization module is connected to a reset signal terminal and a low level terminal, and is configured to initialize the first pixel sub-circuit and the second pixel sub-circuit under the control of a reset signal input at the reset signal terminal; and the data voltage writing module is connected to a data voltage terminal and a gate signal terminal, and is configured, under the control of a signal input at the gate signal terminal, to firstly write a first data voltage to the first pixel sub-circuit and perform compensation for a driving module of the first pixel sub-circuit, and then write a second data voltage to the second pixel sub-circuit and perform compensation for a driving module of the second pixel sub-circuit.
地址 Beijing CN