Providing a multi-phase lockstep integrity reporting mechanism

摘要

In one embodiment, a processor can enforce a blacklist and validate, according to a multi-phase lockstep integrity protocol, a device coupled to the processor. Such enforcement may prevent the device from accessing one or more resources of a system prior to the validation. The blacklist may include a list of devices that have not been validated according to the multi-phase lockstep integrity protocol. Other embodiments are described and claimed.

主权项

1. A processor comprising:
a plurality of cores and a memory controller, wherein the processor is to enforce a blacklist and validate a device coupled to at least one of the plurality of cores according to a multi-phase lockstep integrity protocol in which the processor and the device each perform an integrity protocol gated by control indicators, the blacklist including a list of devices that have not been validated according to the multi-phase lockstep integrity protocol, the processor to act as a master to perform at least a portion of the multi-phase lockstep integrity protocol, to prevent the device from interaction with other components of a platform including the processor and the device until the multi-phase lockstep integrity protocol is completed, the master to place the device on the blacklist responsive to a first value of a first control indicator of the device, to perform a first phase of the multi-phase lockstep integrity protocol responsive to a second value of the first control indicator, and to perform a second phase of the multi-phase lockstep integrity protocol responsive to a second value of a second control indicator of the device.