发明名称 Apparatus and methods for input bias current reduction
摘要 Apparatus and methods for reducing input bias current of electronic circuits are provided herein. In certain implementations, an electronic circuit includes a first input terminal, a second input terminal, an input circuit, and a plurality of input switches including at least a first input switch and a second input switch. The first input switch is electrically connected between the first input terminal and a first input of the input circuit, the second input switch is electrically connected between the second input terminal and a second input of the input circuit, and the first and second input switches can be opened and closed using a clock signal. The electronic circuit further includes a charge compensation circuit for compensating for charge injection through the first and second input switches during transitions of the clock signal.
申请公布号 US9246484(B2) 申请公布日期 2016.01.26
申请号 US201414201234 申请日期 2014.03.07
申请人 Analog Devices, Inc. 发明人 Kusuda Yoshinori
分类号 G05F1/10;H03K17/16;H03M1/66 主分类号 G05F1/10
代理机构 Knobbe, Martens, Olson & Bear, LLP 代理人 Knobbe, Martens, Olson & Bear, LLP
主权项 1. An electronic circuit comprising: a first input terminal and a second input terminal; an input circuit including a first input and a second input; a plurality of input switches controlled by one or more clock signals, wherein the plurality of input switches comprises: a first input switch electrically connected between the first input terminal and the first input of the input circuit, anda second input switch electrically connected between the second input terminal and the second input of the input circuit; and a charge compensation circuit comprising a first output and a second output, wherein the charge compensation circuit is configured to compensate for charge injected by the plurality of input switches associated with at least one transition of the one or more clock signals.
地址 Norwood MA US