| 发明名称 |
PROGRAMMABLE ADDRESS MAPPING AND MEMORY ACCESS OPERATIONS |
| 摘要 |
Programmable address mapping and memory access operations are disclosed. An example apparatus includes an address translator to translate a first host physical address to a first intermediate address. The example apparatus also includes a programmable address decoder to decode the first intermediate address to a first hardware memory address of a first addressable memory location in a memory, the programmable address decoder to receive a first command to associate the first host physical address with a second addressable memory location in the memory by changing a mapping between the first intermediate address and a second hardware memory address of the second addressable memory location. |
| 申请公布号 |
US2016019161(A1) |
申请公布日期 |
2016.01.21 |
| 申请号 |
US201314773549 |
申请日期 |
2013.03.12 |
| 申请人 |
HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. |
发明人 |
Patel Tushar;Kelly Terence P.;Wright Mitchel E. |
| 分类号 |
G06F12/10;G06F13/16 |
主分类号 |
G06F12/10 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. An apparatus comprising:
an address translator to translate a first host physical address to a first intermediate address; and a programmable address decoder to decode the first intermediate address to a first hardware memory address of a first addressable memory location in a memory, the programmable address decoder to receive a first command to associate the first host physical address with a second addressable memory location in the memory by changing a mapping between the first intermediate address and a second hardware memory address of the second addressable memory location. |
| 地址 |
Houston TX US |
