EDGE INTERCONNECT PACKAGING OF INTEGRATED CIRCUITS FOR POWER SYSTEMS

摘要

Disclosed is an integrated circuit packaging system that includes first and second microchips. Each microchip includes a top surface, a bottom surface, one or more quilt package nodules fabricated on said top surface, and one or more bottom surface connectors. The system also includes a substrate to which the first and second microchips are mounted. The first and second microchips are connected via the quilt package nodules.