发明名称 |
THREE-STAGE MEMORY ARRANGEMENT |
摘要 |
<p>An electronic memory arrangement having at least three memory areas, a memory control unit, and a writing memory-accessing unit configured to carry out write access. A reading memory-accessing unit is configured to carry out read accesses. The memory control unit determines read and write access to the at least three memory areas, and the memory control unit is configured such that after the writing of a first data packet to one of the three memory areas, a following second data packet to be written is written to one on the three memory area to which read access does not place simultaneously during the write access of the second data packet.</p> |
申请公布号 |
EP2601559(B1) |
申请公布日期 |
2016.01.20 |
申请号 |
EP20110738431 |
申请日期 |
2011.07.22 |
申请人 |
CONTINENTAL TEVES AG & CO. OHG |
发明人 |
SCHRIEFER, JÖRN;SCHERSCHMIDT, JÜRGEN;PEICHL, THOMAS |
分类号 |
G05B19/042 |
主分类号 |
G05B19/042 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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