发明名称 |
Low-power biasing networks for superconducting integrated circuits |
摘要 |
A superconducting integrated circuit, comprising a plurality of superconducting circuit elements, each having a variation in operating voltage over time; a common power line; and a plurality of bias circuits, each connected to the common power line, and to a respective superconducting circuit element, wherein each respective bias circuit is superconducting during at least one time portion of the operation of a respective superconducting circuit element, and is configured to supply the variation in operating voltage over time to the respective superconducting circuit element. |
申请公布号 |
US9240773(B1) |
申请公布日期 |
2016.01.19 |
申请号 |
US201314064267 |
申请日期 |
2013.10.28 |
申请人 |
Hypres, Inc. |
发明人 |
Mukhanov Oleg A.;Kirichenko Alexander F.;Kirichenko Dmitri |
分类号 |
H01B12/02;H01L39/24;H03K3/38;H01B12/16 |
主分类号 |
H01B12/02 |
代理机构 |
Ostrolenk Faber LLP. |
代理人 |
Hoffberg, Esq. Steven M.;Ostrolenk Faber LLP. |
主权项 |
1. A biasing network for circuits comprising a plurality of Josephson junctions, having a plurality of bias elements in parallel branches, each branch comprising a bias element biasing a circuit comprising at least one Josephson junction, the bias current in a respective branch being inversely proportional to the bias impedance value. |
地址 |
Elmsford NY US |