MANUFACTURING METHOD OF GRAPHENE MODULATED HIGH-K OXIDE AND METAL GATE MOS DEVICE

摘要

A manufacturing method of a graphene modulated high-k oxide and metal gate Ge-based MOS device, which comprises the following steps: 1) introducing a graphene thin film on a Ge-based substrate; 2) conducting fluorination treatment to the graphene thin film to form fluorinated graphene; 3) activating the surface of the fluorinated graphene by adopting ozone plasmas, and then forming a high-k gate dielectric on the surface of the fluorinated graphene through an atomic layer deposition technology; and 4) forming a metal electrode on the surface of the high-k gate dielectric. Since the present invention utilizes the graphene as a passivation layer to inhibit the formation of unstable oxide GeOx on the surface of the Ge-based substrate and to stop mutual diffusion between the gate dielectric and the Ge-based substrate, the interface property between Ge and the high-k gate dielectric layer is improved. The fluorinated graphene can enable the graphene to become a high-quality insulator on the basis of keeping the excellent property of the graphene, so that the influence thereof on the electrical property of the Ge-based device is reduced. By adopting the ozone plasmas to treat the Ge-based graphene and then by adopting the atomic layer deposition technology, an ultrathin Hf-based high-k gate dielectric layer can be obtained.

主权项

1. A manufacturing method of a graphene modulated high-k oxide and metal gate Ge-based MOS device, characterized in that the manufacturing method at least comprises the following steps:
1) introducing a graphene thin film on a Ge-based substrate; 2) conducting fluorination treatment to the graphene thin film to form a fluorinated graphene insulating thin layer; 3) activating the surface of the fluorinated graphene by adopting ozone plasmas, and then forming a high-k gate dielectric on the surface of the fluorinated graphene through an atomic layer deposition technology; 4) forming a metal electrode on the surface of the high-k gate dielectric.