发明名称 CONTROL DEVICE
摘要 A control system CPU card includes a control CPU chip having a first core and a second core, and a main memory for storing information. A standby system CPU card includes a standby CPU chip having a first core and a second core, and a main memory for storing information. An I/F performs communication to allow the CPU cards to share the information. In the control system CPU card, when the first core is normal, the first core performs control calculation and outputs a calculation result. When the first core is abnormal, the second core is switched to a control core, to perform control calculation and continue output of a calculation result. When the cores are both abnormal, system switching is performed from the control system CPU card to the standby system CPU card.
申请公布号 US2016004241(A1) 申请公布日期 2016.01.07
申请号 US201314768131 申请日期 2013.02.15
申请人 YOSHIIKE Hisao 发明人 YOSHIIKE Hisao
分类号 G05B19/042 主分类号 G05B19/042
代理机构 代理人
主权项 1. A control device comprising: a control system CPU card including a control CPU chip having a control core and one or a plurality of standby cores, and a main memory for storing information; a standby system CPU card including a standby CPU chip having a control core and one or a plurality of standby cores, and a main memory for storing information; and an interface for performing communication to allow the control system CPU card and the standby system CPU card to share the information, wherein in the control system CPU card, when the control core is normal, the control core performs control calculation and outputs a calculation result,when the control core is abnormal, one of the standby cores is switched to a core for control, to perform the control calculation and continue output of the calculation result, andwhen the control core and the one or plurality of standby cores are all abnormal, system switching is performed from the control system CPU card to the standby system CPU card.
地址 US