发明名称 Transistor(s) with different source/drain channel junction characteristics, and methods of fabrication
摘要 Field-effect transistors (FETs) and methods of fabricating field-effect transistors are provided, with one or both of a source cavity or a drain cavity having different channel junction characteristics. The methods include, for instance, recessing a semiconductor material to form a cavity adjacent to a channel region of the transistor, the recessing defining a bottom channel interface surface and a sidewall channel interface surface within the cavity; providing a protective liner over the sidewall channel interface surface, with the bottom channel interface surface being exposed within the cavity; processing the bottom channel interface surface to facilitate forming a first channel junction of the transistor; and removing the protective liner from over the sidewall channel interface surface, and subsequently processing the sidewall channel interface surface to form a second channel junction of the transistor, where the first and second channel junctions have different channel junction characteristics.
申请公布号 US9230802(B2) 申请公布日期 2016.01.05
申请号 US201414282094 申请日期 2014.05.20
申请人 GLOBALFOUNDRIES INC. 发明人 Tripathi Neeraj;Prindle Christopher Michael
分类号 H01L21/30;H01L21/46;H01L21/02;H01L29/66;H01L29/78;H01L29/08 主分类号 H01L21/30
代理机构 Heslin Rothenberg Farley & Mesiti P.C. 代理人 Heslin Rothenberg Farley & Mesiti P.C. ;Mesiti, Esq. Nicholas
主权项 1. A method of fabricating field effect transistors (FETs), the method comprising: recessing a semiconductor material to form a cavity therein adjacent to a channel region of a transistor, the recessing defining a first channel interface surface and a second channel interface surface within the cavity; providing a protective liner over the second channel interface surface within the cavity, with the first channel interface surface being exposed within the cavity; processing the first channel interface surface to facilitate forming a first channel junction of the transistor at the first channel interface surface within the cavity; and removing the protective liner from over the second channel interface surface, and processing the second channel interface surface to form a second channel junction of the transistor at the second channel interface surface within the cavity, wherein the first channel junction of the transistor and the second channel junction of the transistor comprise one or more different channel junction characteristics.
地址 Grand Cayman KY