发明名称 Memory test system and method
摘要 An exemplary embodiment of the present disclosure illustrates a memory test system comprising a memory device, a probe card, and a tester. The memory device comprises a memory die with a plurality of memory banks, a plurality of input circuits, and a plurality of output circuits, wherein each of the input circuits has a first input pin and a second pin, the first input pins of the input circuits are used to read a plurality of patches of data stored in memory cells of the memory banks, and the second input pins are used to receive a compressed result. The output circuits receive compressed signals output from the input circuits, and the probe card mixes the compressed output signals output from the output circuits to output a mixed compressed output signal to the tester.
申请公布号 US9229059(B2) 申请公布日期 2016.01.05
申请号 US201314099318 申请日期 2013.12.06
申请人 ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. 发明人 Chou Min-Chung
分类号 G01R31/319;G11C29/48;G11C29/26;G11C29/00;G11C29/56;G11C29/12;G11C29/40;G11C29/10;G11C29/36 主分类号 G01R31/319
代理机构 Li & Cai Intellectual Property (USA) Office 代理人 Li & Cai Intellectual Property (USA) Office
主权项 1. A memory test system, comprising: a memory device, comprising a memory die with a plurality of memory banks, a plurality of input circuits, and a plurality of output circuits, wherein each of the input circuits has a first input pin and a second pin, the first input pins of the input circuits are used to read a plurality of patches of data stored in memory cells of the memory banks, and the second input pins are used to receive a compressed result; a probe card, electrically connected to the output circuits; and a tester, electrically connected to the probe card; wherein the output circuits receive compressed signals output from the input circuits, and the probe card mixes compressed output signals output from the output circuits to output a mixed compressed output signal to the tester.
地址 Hsinchu TW