Structure and method for E-beam in-chip overlay mark

摘要

The present disclosure provides an integrated circuit structure that includes a semiconductor substrate having a first region and a second region having an area less than about 10 micron×10 micron; a first material layer over the semiconductor substrate and patterned to have a first circuit feature in the first region and a first mark in the second region; and a second material layer over the first material layer and patterned to have a second circuit feature in the first region and a second mark in the second region. The first mark includes first mark features oriented in a first direction, and second mark features oriented in a second direction perpendicular to the first direction. The second mark includes third mark features oriented in the first direction, and fourth mark features oriented in the second direction.

主权项

1. A method comprising:
forming a first overlay mark in a first region of a substrate, wherein the first overlay mark has a top surface facing away from the substrate; forming a second overlay mark in the first region of the substrate, wherein the second overlay mark overlaps a first portion of the top surface of the first overlay mark such that a second portion of the top surface of the first overlay mark is exposed; and determining an overlay shift defined as (D1−D2)/2, wherein the first overlay mark has a first width measured between a first edge and a second edge of the first overlay mark, wherein the second overlay mark has a second width measured between a third edge and a fourth edge of the second overlay mark, and wherein D1 is a first distance defined between the first edge and the third edge, and wherein D2 is a second distance defined between the second edge and the fourth edge.