Identifying load-hit-store conflicts

摘要

A computing device identifies a load instruction and store instruction pair that causes a load-hit-store conflict. A processor tags a first load instruction that instructs the processor to load a first data set from memory. The processor stores an address at which the first load instruction is located in memory in a special purpose register. The processor determines where the first load instruction has a load-hit-store conflict with a first store instruction. If the processor determines the first load instruction has a load-hit store conflict with the first store instruction, the processor stores an address at which the first data set is located in memory in a second special purpose register, tags the first data set being stored by the first store instruction, stores an address at which the first store instruction is located in memory in a third special purpose register and increases a conflict counter.

主权项

1. A computer program product for identification of a load instruction and store instruction pair that causes a load-hit-store conflict, the computer program product comprising:
one or more computer-readable storage devices and program instructions stored on at least one of the one or more computer-readable tangible storage devices, wherein the one or more computer-readable storage devices is not construed to include transitory media, the program instructions comprising: program instructions to tag a first load instruction that instructs the processor to load a first data set from a memory; program instructions to store an address at which the first load instruction is located in memory in a first special purpose register; program instructions to determine whether the first load instruction has a load-hit-store conflict with a first store instruction, wherein the load-hit-store conflict occurs when the first load instruction instructs the processor to load the first data set from memory before the first data set has been stored into memory by the first store instruction; responsive to determining the first load instruction has a load-hit-store conflict with the first store instruction, program instructions to store an address at which the first data set is located in memory in a second special purpose register, to tag the first data set being stored by the first store instruction, to store an address at which the first store instruction is located in memory in a third special purpose register, and to increase a conflict counter.