发明名称 |
THREE DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE WITH LINE SHARING SCHEME |
摘要 |
A semiconductor memory device includes a memory array including memory blocks stacked in a plurality of layers over a substrate and an operation circuit suitable for performing a read operation and a program loop to memory cells included in the memory blocks, wherein word lines of the memory blocks are coupled to each other and a pair of the memory blocks are arranged vertically adjacent to each other and share bit lines. |
申请公布号 |
US2015380089(A1) |
申请公布日期 |
2015.12.31 |
申请号 |
US201514843616 |
申请日期 |
2015.09.02 |
申请人 |
SK hynix Inc. |
发明人 |
ARITOME Seiichi |
分类号 |
G11C16/04;G11C16/26;G11C16/24;G11C16/30;H01L27/115;G11C16/08;G11C16/10 |
主分类号 |
G11C16/04 |
代理机构 |
|
代理人 |
|
主权项 |
1. A semiconductor memory device, comprising:
a memory array including a first to a fourth memory blocks sequentially stacked over a substrate; a first circuit suitable for performing a read operation and a program loop to memory cells included in the first or the second memory block; and a second circuit suitable for performing the read operation and the program loop to memory cells included in the third or the fourth memory block, wherein the first circuit is coupled to the first and the second memory blocks through lower bit lines, and wherein the second circuit is coupled to the third and the fourth memory blocks through upper bit lines. |
地址 |
Gyeonggi-do KR |