LDMOS transistors for CMOS technologies and an associated production method

摘要

In a semiconductor component or device, a lateral power effect transistor is produced as an LDMOS transistor in such a way that, in combination with a trench isolation region (12) and the heavily doped feed guiding region (28, 28A), an improved potential profile is achieved in the drain drift region (8) of the transistor. For this purpose, in advantageous embodiments, it is possible to use standard implantation processes of CMOS technology, without additional method steps being required.

主权项

1. A method of forming a semiconductor device including a lateral field effect power transistor, wherein the method comprises the steps of:
forming a trench isolation region and a drain drift region having a first conductivity type, the trench isolation region being at least partially embedded in the drain drift region of the lateral field effect power transistor; performing one or more ion implantation processes forming at least one of a deep drain region and a source region and a drain and a source extension region in a small signal transistor having a second conductivity type inverse to the first conductivity type; forming one or more field guiding regions in the drain drift region of the lateral field effect power transistor, by at least one of the ion implantation processes.