发明名称 半導体装置
摘要 This invention provides a technique advantageous to improve the operating speed of an integrated circuit. In a semiconductor device in which an n-type transistor and a p-type transistor are formed on the (551) plane of silicon, the thickness of a silicide layer which is in contact with a diffusion region of the n-type transistor is smaller than that of a silicide layer which is in contact with a diffusion region of the p-type transistor.
申请公布号 JP5835790(B2) 申请公布日期 2015.12.24
申请号 JP20110014366 申请日期 2011.01.26
申请人 国立大学法人東北大学 发明人 大見 忠弘;田中 宏明
分类号 H01L21/8238;H01L21/28;H01L21/336;H01L27/08;H01L27/092;H01L29/417;H01L29/786 主分类号 H01L21/8238
代理机构 代理人
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