3D INTERCONNECT STRUCTURE COMPRISING THROUGH-SILICON VIAS COMBINED WITH FINE PITCH BACKSIDE METAL REDISTRIBUTION LINES FABRICATED USING A DUAL DAMASCENE TYPE APPROACH

摘要

A 3D interconnect structure and method of manufacture are described in which a through-silicon vias (TSVs) and metal redistribution layers (RDLs) are formed using a dual damascene type process flow. A silicon nitride or silicon carbide passivation layer may be provided between the thinned device wafer back side and the RDLs to provide a hermetic barrier and etch stop layer during the process flow.

主权项

1. A 3D interconnect structure comprising:
a semiconductor substrate having a front surface and a back surface; a dual damascene via extending through the semiconductor substrate between the front and back surfaces; a redistribution layer (RDL) formed over the back surface of the substrate and electrically coupled to the via, wherein a portion of the RDL is over the via and a portion of the RDL is not over the via; and a passivation layer formed over the RDL, wherein the passivation layer has an opening exposing a portion of the portion of the RDL not over the via, but not exposing the portion of the RDL over the via.