发明名称 FEEDBACK DELAY REDUCTION IN FORCE FEEDBACK DEVICES
摘要 A feedback circuit provides a feedback signal to a transducer. The feedback circuit includes an ADC that generates digital representations of a feedback signal, digital controller that identifies adjustments for the feedback, and DAC that generates an analog output of the adjusted feedback signal. The digital controller performs speculative computation to identify adjustments for the feedback signal output for each output value from the ADC prior to receiving the output from the ADC. The ADC and DAC include sigma-delta modulators that operate with a zero clock cycle delay in a forward path. The ADC, digital controller, and DAC generate adjustments to the feedback output signal with reduced delay that reduce phase lag and improve phase margin to maintain stability in the transducer.
申请公布号 WO2015189150(A2) 申请公布日期 2015.12.17
申请号 WO2015EP62711 申请日期 2015.06.08
申请人 ROBERT BOSCH GMBH 发明人 BALACHANDRAN, GANESH;PETKOV, VLADIMIR
分类号 H03M3/00 主分类号 H03M3/00
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