发明名称 METHOD OF ANALYZING SEMICONDUCTOR FAILURE, SYSTEM OF DETERMINING PRIORITY OF SEMICONDUCTOR FAILURE ANALYSIS, AND METHOD OF MANUFACTURING SEMICONDUCTOR APPARATUS USING THE SAME
摘要 PROBLEM TO BE SOLVED: To provide a method of analyzing semiconductor failure which efficiently specify a cause of failure, system of determining a priority of failure analysis, and a method of manufacturing a semiconductor device which establishes improved manufacturing yield. SOLUTION: Respective results of trouble diagnosis, physical analysis and inline test are substituted with physical positions and area on corresponding semiconductor chips. An overlapping part of the substituted areas with any two or more combinations among the three results is obtained. When an analysis object is in initial status, the priority is determined as a top, depending on the size of area with a combination of the three results including the result of the inline test, and as a second priority, depending on the size of area of a combination of the one result including the result of the inline test. When the analysis object is in matured status, the priority is determined depending on the size of area with a combination of the two results excluding the result of the inline test. According to the determined priority, a concrete failure cause is analyzed. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009135151(A) 申请公布日期 2009.06.18
申请号 JP20070307933 申请日期 2007.11.28
申请人 RENESAS TECHNOLOGY CORP 发明人 SUZUKI TAKESHI;SHIMASE AKIRA
分类号 H01L21/66;H01L21/02 主分类号 H01L21/66
代理机构 代理人
主权项
地址