| 摘要 |
Disclosed is a semiconductor device including chips having output terminals connected in common to an external terminal. Each of the chips includes a data input and output section that provides a difference during testing between a first driving capability setting the output terminal to a first power supply potential side and a second driving capability setting the output terminal to a second power supply potential side. During testing, the second driving capability is set so as to be higher than the first driving capability. The output signal level from each chip to the terminal equal to the second power supply potential indicates a fail, and the output signal level from each chip to the terminal equal to the first power supply potential indicate a pass. Under this condition, if at least one or more of the multiple chips outputs a fail signal, the second power supply potential is delivered to the external terminal to which the terminals are connected in common. A test method for the semiconductor memory is also disclosed (FIG. 1). |
