POWER SOURCE VOLTAGE DROP VERIFYING METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE, AND SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE

摘要

PROBLEM TO BE SOLVED: To provide a power source voltage drop verifying method of a semiconductor integrated circuit device, and the semiconductor integrated circuit device, wherein a voltage drop in actual device operation is visually and easily verified with simple constitution. SOLUTION: A current is supplied to an inverter chain 3 formed in a semiconductor integrated circuit device to acquire a light emission intensity distribution thereof, which in turn is compared with a power supply network analysis result of the semiconductor integrated circuit device to specify a power source voltage drop place. COPYRIGHT: (C)2009,JPO&INPIT