| 摘要 |
A method for storing a digital signal and a non-volatile semiconductor memory device are provided to store digital data by controlling an offset code of a comparator. Vdd is supplied to a node(32) and 0V is supplied to the other node(31) in order to give a stress to transistors(33, 36). An enable signal is supplied to top and bottom nodes(37, 38). A voltage of the node increases to Vdd and a voltage of the other node decreases to 0V by a normal operation of a comparator. When a voltage difference between the top node and the bottom node is increased, a voltage of the node follows a voltage of the top node. A gate-source voltage of a large value is supplied to a transistor. A threshold voltage of the transistor is increased by FN stress. A gate-source voltage of a large value is supplied to a transistor.
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