| 摘要 |
<p>A multilayer printed wiring board having a mounting section for mounting semiconductor devices such as an IC chip on the front layer of a build-up wiring layer, wherein the pitch between through-hole conductors arranged directly below the area on which the semiconductor device such as an IC chip is mounted is smaller than the pitch between through-hole conductors mounted in other areas to control the delay in power supply to the transistor of the processor core section of the mounted IC chip in order to suppress errors.</p> |
