发明名称 Logic cell having two isolated redundant outputs, and correspondant integrated circuit
摘要 <p>The cell has P path equipped with a P type transistor (TP5,) and an N path equipped with an N type transistor (TN5). An isolation element (402) connects the paths and forms an isolation resistance (404), where the resistance is greater than the resistance of the transistors. The element includes a P-channel MOS transistor mounted in series with an N-channel MOS transistor, where the resistances form a voltage divider bridge. The MOS transistors cooperate with an evacuation unit having a transistor with a commended well.</p>
申请公布号 EP1755222(B1) 申请公布日期 2009.10.07
申请号 EP20060118095 申请日期 2006.07.28
申请人 ATMEL NANTES SA 发明人 BRIET, MICHEL;VERDANT, ARNAUD
分类号 H03K19/003 主分类号 H03K19/003
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