| 摘要 |
A receiver includes an RF bridge and a processor coupled to the RF bridge to receive an information signal from the RF bridge. The processor includes a clock source and a processor front end. The processor front end includes first and second frequency sources, a processor down converter and an analog to digital converter. The first frequency source generates a reference signal based on a signal from the clock source. The reference signal is coupled to the RF bridge. The second frequency source generates a first local oscillator signal based on the signal from the clock source. The processor down converter heterodynes the first local oscillator signal and the information signal. The analog to digital converter is coupled to the processor down converter and provides a digitized down converted signal.
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