CIRCUIT HAVING AN ACTIVE CLOCK SHIELDING STRUCTURE, AND SEMICONDUCTOR INTEGREATED CIRCUIT INCLUDING THE SAME

摘要

PURPOSE: A circuit of an active clock shielding structure is provided to use a power gating signal transmission line and/or retention signal transmission line as a shielding line by arranging the power gating signal transmission line and/or retention signal transmission line in parallel to a clock signal transmission line. CONSTITUTION: A circuit of an active clock shielding structure includes a logic circuit, a power gating circuit, a clock signal transmission line(260), at least power gating signal transmission line(280). The logic circuit receives a clock signal and performs a logic operation. The power gating circuit converts the logic circuit into an active mode or slip mode in response to the power gating signal. The clock signal transmission line transmits the clock signal. The power gating signal transmission lien transmits the power gating signal. The power gating signal transmission line operates with a pair of the shielding lines of the clock signal transmission line.