发明名称 |
METHOD AND APPARATUS OF SFDR ENHANCEMENT |
摘要 |
A track-and-hold or sample-and-hold (S/H) circuit for an analog-to-digital converter (ADC) is provided. A difference between the disclosed S/H circuit and conventional S/H circuits is the use of a peaking circuit. This peaking circuit generally provides increased current to switching transistor when transitioning between track and hold which can increase the Spurious-Free Dynamic Range (SFDR) as low frequencies, by as much as 15 dB.
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申请公布号 |
US2009219060(A1) |
申请公布日期 |
2009.09.03 |
申请号 |
US20090393182 |
申请日期 |
2009.02.26 |
申请人 |
TEXAS INSTRUMENTS INCORPORATED |
发明人 |
PAYNE ROBERT F.;CORSI MARCO |
分类号 |
G11C27/02;H03K3/00 |
主分类号 |
G11C27/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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