发明名称 ANALOG/DIGITAL CONVERSION CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide an analog/digital (A/D) conversion circuit allowing reduction of power consumption in accordance with an operation mode. SOLUTION: In the A/D conversion circuit, a conversion stage 20-1 is stopped under a power saving mode and an input signal to the conversion stage 20-1 is input to a subsequent conversion stage 20-2. Thus, A/D conversion is performed while reducing the number of conversion stages in comparison with a normal mode, thereby effectively reducing power consumption. COPYRIGHT: (C)2011,JPO&INPIT
申请公布号 JP2010278985(A) 申请公布日期 2010.12.09
申请号 JP20090132360 申请日期 2009.06.01
申请人 TEXAS INSTR JAPAN LTD 发明人 OYAMA SOICHIRO;ARIYOSHI KATSUHIKO
分类号 H03M1/14 主分类号 H03M1/14
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