发明名称 SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To simplify selection of an I/O line, and to prevent increment of area of a memory cell array, with respect to a semiconductor device which uses an open bit line system and can switch the number of I/O. SOLUTION: The semiconductor device is provided with a memory mat MAT0 selected when X13 is (0) and X11, X12 are (0, 0) and when the number of I/O is 8 bits; a memory mat MAT8 selected when X13 is (1) and X11, X12 are (0, 0) and when the number of I/O is 8 bits; and a memory mat MAT4 selected when X11, X12 are (0, 0) independently of the X13. When the number of I/O is 16 bits, X13 is neglected, and when X11, X12 are (0, 0), memory mats 0, 4, 8 are all selected. Thus, since the memory mat MAT4 is used for both an upper side and a lower side, so to speak, complex of control and increment of area are prevented. COPYRIGHT: (C)2011,JPO&INPIT
申请公布号 JP2011090754(A) 申请公布日期 2011.05.06
申请号 JP20090245619 申请日期 2009.10.26
申请人 ELPIDA MEMORY INC 发明人 NAKAOKA YUJI;ICHIKAWA HIROSHI
分类号 G11C11/401 主分类号 G11C11/401
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