| 发明名称 |
WIRING SUBSTRATE, MANUFACTURING METHOD THEREOF, AND SEMICONDUCTOR PACKAGE |
| 摘要 |
A disclosed wiring substrate includes an insulating layer, a recess formed on a surface of the insulating layer, and an alignment mark formed inside of the recess, wherein a face of the alignment mark is roughened, recessed from the surface of the insulating layer, and exposed from the recess.
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| 申请公布号 |
US2011169164(A1) |
申请公布日期 |
2011.07.14 |
| 申请号 |
US20100968405 |
申请日期 |
2010.12.15 |
| 申请人 |
SHINKO ELECTRIC INDUSTRIES CO., LTD. |
发明人 |
NAKAMURA JUNICHI;KOBAYASHI KAZUHIRO |
| 分类号 |
H01L23/498;H05K1/00;H05K3/10 |
主分类号 |
H01L23/498 |
| 代理机构 |
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