发明名称 Memory control circuit and integrated circuit including branch instruction detection and operation mode control of a memory
摘要 The memory unit is compatible with a plurality of operation modes. The plurality of operation modes include the normal mode allowing access and the standby mode consuming a lower power than the normal mode. The branch detection section detects a branch instruction from an instruction fetched from the memory unit by the CPU. The mode control section changes an operation mode of the memory unit according to a detection result by the branch detection section.
申请公布号 US8161272(B2) 申请公布日期 2012.04.17
申请号 US20080318211 申请日期 2008.12.23
申请人 YAMAZOE KIMINARI;RENESAS ELECTRONICS CORPORATION 发明人 YAMAZOE KIMINARI
分类号 G06F9/00;G06F1/32 主分类号 G06F9/00
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