发明名称 Power supply noise analysis method, system and program for electronic circuit board
摘要 Disclosed is a method of analyzing power supply noise including: extracting power supply and ground information as well as a capacitor and an LSI chip connected to a power supply and ground from electronic circuit design information; creating an analytical model of power supply noise by connecting respective models of the impedance characteristics of the capacitor and LSI chip to mounting positions of a board model; calculating reflected voltage at the LSI chip based on an impedance characteristic between the power supply of the LSI chip and ground; calculating power supply noise from the LSI chip to the electronic circuit board; based on the reflected voltage at the LSI chip.
申请公布号 US8200445(B2) 申请公布日期 2012.06.12
申请号 US20090401082 申请日期 2009.03.10
申请人 KASHIWAKURA KAZUHIRO;NEC CORPORATION 发明人 KASHIWAKURA KAZUHIRO
分类号 G01R25/00;G01R27/00;G01R29/08;G06F17/50;H05K3/00 主分类号 G01R25/00
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