发明名称 |
SYSTEM-ON-CHIP INCLUDING TIME DIFFERENCE ADDER, SYSTEM-ON-CHIP INCLUDING TIME DIFFERENCE ACCUMULATOR, SIGMA-DELTA TIME DIGITAL CONVERTER, DIGITAL PHASE-LOCKED LOOP, TEMPERATURE SENSOR, AND SYSTEM-ON-CHIP |
摘要 |
<P>PROBLEM TO BE SOLVED: To provide a system-on-chip including a time difference adder for adding the time difference between input signals. <P>SOLUTION: A time difference adder 100 generates a first output signal SOUT1 and a second output signal SOUT2 in response to a first input signal SIN1, a second input signal SIN2, a third input signal SIN3, and a fourth input signal SIN4. The time difference adder 100 adds a first time difference TD1 between the first input signal SIN1 and the second input signal SIN2 and a second time difference TD2 between the third input signal SIN3 and the fourth input signal SIN4, thereby outputting the first output signal SOUT1 and the second output signal SOUT2 having a time difference (TD1+TD2) corresponding to the sum of the first time difference TD1 and the second time difference TD2. Thus, signal processing can be performed in a time domain under a low power supply voltage environment, and the performance can be improved. <P>COPYRIGHT: (C)2013,JPO&INPIT |
申请公布号 |
JP2012249286(A) |
申请公布日期 |
2012.12.13 |
申请号 |
JP20120117722 |
申请日期 |
2012.05.23 |
申请人 |
SAMSUNG ELECTRONICS CO LTD |
发明人 |
KIM SEONG-JEONG;KIM JI-HYON |
分类号 |
H03K5/26;H03L7/085;H03M1/50 |
主分类号 |
H03K5/26 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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