发明名称 PERFORMANCE OF PROCESSORS IS IMPROVED BY LIMITING NUMBER OF BRANCH PREDICTION LEVELS
摘要 A method utilizes information provided by performance monitoring hardware to dynamically adjust the number of levels of speculative branch predictions allowed (typically 3 or 4 per thread). for a processor core. The information includes cycles-per-instruction (CPI) for the processor core and number of memory accesses per unit time. If the CPI is below a CPI threshold; and the number of memory accesses (NMA) per unit time is above a prescribe threshold, the number of levels of speculative branch predictions is reduced per thread for the processor core. Likewise, the number of levels of speculative branch predictions could be increased, from a low level to maximum allowed, if the CPI threshold is exceeded or the number of memory accesses per unit time is below the prescribed threshold.
申请公布号 US2013145135(A1) 申请公布日期 2013.06.06
申请号 US201113308696 申请日期 2011.12.01
申请人 BELL, JR. ROBERT H.;CHEN WEN-TZER T.;INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 BELL, JR. ROBERT H.;CHEN WEN-TZER T.
分类号 G06F9/38;G06F9/30 主分类号 G06F9/38
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